Plating Device, Plating Method, Semiconductor Device, And Method For Manufacturing Semiconductor Device

ABSTRACT

An object of the present invention is to provide a face-down type jet plating device in which deterioration in plating quality due to minute solid foreign matters derived from a black film etc. is prevented without impairing operativity. The plating device is designed such that a partition ( 7 ) is provided between a semiconductor wafer ( 1 ) and an anode ( 5 ) so that the anode ( 5 ) and the semiconductor wafer ( 7 ) are separated from each other and a plating tank ( 100 ) is divided into a substrate-to-be-plated chamber and an anode chamber.

TECHNICAL FIELD

The present invention relates to a plating device, a plating method, asemiconductor device, and a method for manufacturing a semiconductordevice. Specifically, the present invention relates to: a plating deviceand a plating method allowing minute plating for wiring to be formed ona surface to be plated; and a semiconductor device and a method formanufacturing the semiconductor device

BACKGROUND ART

Recently, metal plating is used for forming wiring on a semiconductorwafer and the like. Examples of a conventional device for metal platinginclude: a face-down type jet plating device; a rack-type verticalplating device; and a face-up type jet plating device.

As shown in FIG. 7, the face-down type jet plating device includes: awafer holder 2′ for holding a semiconductor wafer 1′; a cup 3′; aplating solution jetting pipe 4′ for supplying a plating solution intothe cup 3′; and an anode 5′. The anode 5′ is generally made of highphosphorous copper. The anode 5′ is provided in the cup 3′. The cup 3′is provided with the wafer holder 2′. The semiconductor wafer 1′ is heldby the wafer holder 2′ so as to be above the cup 3′. The platingsolution jetting pipe 4′ is provided under the semiconductor wafer 1′ inthe face-down type jet plating device. Consequently, a plating solutionjetted out of the plating solution jetting pipe 4′ is supplied fromunder the semiconductor wafer 1′. As a result, plating is performed on asurface to be plated.

Note that, although not shown in FIG. 7, the face-down type jet platingdevice includes: a plating solution tank for containing the cup 3′therein; a plating solution storage tank for supplying a platingsolution; a pump for circulating the plating solution through theplating device; a filter for filtering solid foreign matters in theplating solution; and a pipe for connecting these members.

In the face-down type jet plating device, a plating solution in theplating solution storage tank is supplied by the pump to the lower partof the cup 3′ through the filter. The plating solution is supplied fromthe lower part of the cup 3′, flows through the plating solution jettingpipe 4′, and reaches, via the anode 5′, a surface of the semiconductorwafer 1 to be plated. Thereafter, the plating solution leaks from aborder of the upper part of the cup 3′ (a space between the wafer holder2′ and the cup 3′) to the outside of the cup 3′, is recovered into theplating solution tank, and reflows into the plating solution storagetank.

Such face-down type jet plating device is disclosed in Patent Document 1for example. Patent Document 1 (Japanese Unexamined Patent PublicationNo. 24307/2001 (Tokukai 2001-24307; published on Jan. 26, 2001))discloses a face-down type jet plating device, which includes “aflowing-out port through which part of the plating solution flowing inthe plating tank is made to flow out of the tank from a through-hole ofthe anode or the periphery of the anode”. Furthermore, a plating devicein which an anode is an insoluble electrode such as platinum is known.

As shown in FIG. 8, the rack-type vertical plating device includes ananode 6″, a rack 24, and a plating tank 12. The anode 6″ is generallyprovided in an anode bag 13 made of a cloth having internal raising.Examples of the anode 6″ include: spherical high phosphorous copper in atitan basket; and a copper plate made of high phosphorous copper. Therack 24 is a plate-shaped jig which includes a power feeding section forthe semiconductor wafer 1 and which has a hole whose inside diameter isa bit smaller than the semiconductor wafer 1. The plating tank 12includes: a wafer suppresser 25 which serves to fix the semiconductorwafer 1 to the rack 24 as well as serves to insulate the back surface ofthe semiconductor wafer 1; and a squeegee (not shown) for stirring aplating solution.

Note that, although not shown in FIG. 8, the rack-type vertical platingdevice includes: a plating solution tank; a plating solution storagetank for supplying a plating solution; a pump for circulating a platingsolution through the plating device; a filter for filtering solidforeign matters in the plating solution; a pipe for connecting thesemembers; and additional devices.

The plating solution is supplied by the pump from the storage tank to aflowing-in port 14 through the filter. Then, the plating solution flowsnear the anode bag 13 including the anode 6 in the plating tank 12.Thereafter, the plating solution reaches a surface of the semiconductorwafer 1 to be plated, flows from an upper edge of the plating tank 12 toa dam 15, and reflows to the plating solution storage tank through areturn pipe (not shown) which is a part of the dam 15. Such rack-typevertical plating device is disclosed in Patent Document 2 (JapaneseUnexamined Patent Publication No. 87299/2000 (Tokukai 2000-87299;published on Mar. 28, 2000)) for example.

A face-up type jet plating device is designed such that asurface-to-be-plated of a semiconductor wafer is positioned to faceupward, an anode is positioned to face the surface-to-be-plated, and aplating solution is supplied from above the semiconductor wafer.

Such face-up type jet plating device is disclosed in Patent Document 3(Japanese Unexamined Patent Publication No. 49498/2001 (Tokukai2001-49498; published on Feb. 20, 2001)) and Patent Document 4 (JapaneseUnexamined Patent Publication No. 24308/2001 (Tokukai 2001-24308;published on Jan. 26, 2001)). The face-up type jet plating devicedisclosed in Patent Document 3 is designed such that an ion exchangemembrane or a porous neutral membrane is provided at the bottom of ananode chamber and the anode chamber is filled with a plating solution,thereby preventing a black film from being dried and detached. Theface-up type jet plating device disclosed in Patent Document 4 isdesigned such that a porous member having multiple pores is provided atthe bottom of an anode chamber.

Furthermore, a plating device having different structure from the aboveplating devices is disclosed in Patent Document 5 (Japanese UnexaminedPatent Publication No. 73889/2003 (Tokukai 2003-73889; published on Mar.12, 2003)) for example. This plating device is an electrolytic copperplating device for a semiconductor wafer, in which a plating tank isdivided into a cathode chamber and an anode chamber by using a negativeion exchange membrane and electrolytic copper plating is performed byusing an insoluble electrode as an anode.

In these plating devices, it is very important to form an even laminarflow on a whole surface-to-be-plated of the semiconductor wafer.Therefore, finish of plating is greatly influenced by whether a laminarflow is made from a center to peripheral of the surface-to-be-plated ofthe semiconductor wafer.

A conventional face-up type jet plating device is designed such that asemiconductor wafer is rotated so that a laminar flow of a platingsolution is formed, via a side flowing-in port/flowing-out port, on awhole surface-to-be-plated of a semiconductor wafer. For that reason,the conventional face-up type jet plating device requires not only amechanism for holding a semiconductor wafer but also a mechanism forrotating the semiconductor wafer, resulting in large-scale device.

On the other hand, a conventional face-down jet plating device is sodesigned as to jet a plating solution from a central part of asurface-to-be-plated of a semiconductor wafer, and therefore the platingdevice and the semiconductor wafer are fixed with each other, resultingin a simpler device.

However, the conventional face-down type jet plating device has thefollowing problem.

In the face-down type jet plating device, minute solid foreign mattersattach to a surface-to-be-plated, resulting in deterioration in platingquality. It is attributable to a surface of an anode in a route in whicha plating solution is supplied by a pump from a plating solution storagetank, is filtered by a filter, is supplied from the bottom of a cup,flows near the anode, and reaches a surface-to-be-plated of asemiconductor wafer. When the anode includes high phosphorous copper, ablack film is formed on the surface of the anode. The black film is madeof a monovalent copper complex (Cu⁺) including chlorine (Cl) andphosphorous (P). The black film is made as a result of combinationbetween chlorine and phosphorous and monovalent copper ions generated byanode melting.

The black film can suppress generation of slime by suppressingdisproportionation of copper which is indicated by the following formula(1).

2Cu⁺→Cu+Cu²⁺  (1)

However, the black film once formed tends to be detached from thesurface of the anode. The detached minute black film is conveyed alongwith a flowing plating solution to the surface-to-be-plated of thesemiconductor wafer. Consequently, the black film attaches to the platedsurface of the semiconductor wafer.

The above problem of the black film can be prevented by using aninsoluble electrode as an anode. However, at that time, an additive inthe plating solution is subjected to oxidative decomposition.Consequently, more amount of the plating solution is consumed or adecomposition product due to the oxidative decomposition contaminatesthe plating solution.

On the other hand, in the conventional rack-type vertical platingdevice, an anode including high phosphorous copper is provided in ananode bag made of a cloth having internal raising. Consequently, it ispossible to prevent solid foreign matters derived from a black film fromattaching to a semiconductor wafer. However, such vertical platingdevice requires fixing a semiconductor wafer to a rack so that thesemiconductor wafer is held in a plating tank. This fixation dropsproductivity and plating quality and prevents automation.

DISCLOSURE OF INVENTION

The present invention was made in view of the foregoing problems. Anobject of the present invention is to provide: a plating device and aplating method each of which prevents minute solid foreign mattersderived from a black film etc. from deteriorating plating quality,without impairing operativity in a face-down type jet plating device;and a semiconductor device and a method for manufacturing thesemiconductor device.

In order to solve the foregoing problems, the plating device of thepresent invention is a plating device, including a plating tank whichhas an anode therein and causing a plating solution to flow into theplating tank and to jet upward to touch a surface-to-be-plated of asubstrate-to-be-plated while electrifying between the anode and thesubstrate-to-be-plated, so that plating is performed, the plating tankincluding a partition between the substrate-to-be-plated and the anode,the partition separating the anode from the substrate-to-be-plated, andthe plating tank being divided into a substrate-to-be-plated chamber andan anode chamber.

The plating device of the present invention causes the plating solutionto jet upward to touch the surface-to-be-plated of thesubstrate-to-be-plated while electrifying between the anode and thesubstrate-to-be-plated, so that plating is performed. That is, theplating device of the present invention performs plating in a face-downmanner.

Note that, the “substrate-to-be-plated chamber” is a space including thesubstrate-to-be-plated out of two areas separated by the partition. The“anode chamber” is a space including the anode out of the two areasseparated by the partition.

Further, with the arrangement, the anode and the substrate-to-be-platedare separated from each other by the partition, and the plating tank isdivided into the substrate-to-be-plated chamber and the anode chamber.Consequently, it is possible to prevent particles etc. derived from theanode from contaminating the plated surface.

As described above, with the arrangement, it is possible to provide aplating device capable of preventing deterioration in plating qualitydue to minute solid foreign matters derived from a black film etc.,without impairing operativity.

In order to solve the foregoing problems, the plating method of thepresent invention is a plating method for causing a plating solution toflow into a plating tank and jet upward to touch a surface-to-be-platedof a substrate-to-be-plated while electrifying between an anode in theplating tank and the substrate-to-be-plated, so that plating isperformed, said method comprising the step of dividing a laminar flow ofthe plating solution into a laminar flow of the plating solution jettedto the surface-to-be-plated and a laminar flow of the plating solutionflowing to a neighbor of the anode.

With the arrangement, plating is performed while dividing a laminar flowof the plating solution into a laminar flow of the plating solutionjetted to the surface-to-be-plated and a laminar flow of the platingsolution flowing to a neighbor of the anode. Consequently, it ispossible to prevent particles etc. derived from the anode fromcontaminating the plated surface. As a result, it is possible to preventdeterioration in plating quality due to minute solid foreign mattersderived from a black film etc.

In order to solve the foregoing problems, the method of the presentinvention for manufacturing a semiconductor device is a method,comprising the step of causing a plating solution to flow into a platingtank and to jet upward to touch a surface-to-be-plated of asubstrate-to-be-plated while electrifying between an anode and thesubstrate-to-be-plated in the plating tank, so that plating isperformed, in the step, the anode and the surface-to-be-plated arepositioned to be separated from each other in the plating tank by apartition.

With the arrangement, in the step, plating is performed while the anodeand the surface-to-be-plated are separated from each other in theplating tank by the partition. Consequently, it is possible to preventparticles etc. derived from the anode from contaminating the platedsurface.

As a result, with the arrangement, it is possible to obtain asemiconductor device which is free from minute solid foreign mattersderived from a black film etc. on the surface of the anode and which hasplated wiring with high quality.

In order to solve the foregoing problems, the semiconductor device ofthe present invention is manufactured through the method formanufacturing a semiconductor device.

With the arrangement, the semiconductor device is manufactured throughthe method. Consequently, it is possible to provide a semiconductordevice which is free from minute solid foreign matters derived from ablack film etc. on the surface of the anode and which has plated wiringwith high quality.

Additional objects, features, and strengths of the present inventionwill be made clear by the description below.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a cross sectional drawing schematically illustrating astructure of a plating tank provided in a plating device of anembodiment of the present invention.

FIG. 2 is a cross sectional drawing illustrating an example of astructure of a wafer holder of the plating tank.

FIG. 3 are drawings illustrating a structure of an area surrounded by aninternal cylinder and a partition. The upper drawing is a top plandrawing seen from a surface of a semiconductor wafer to be plated. Thelower drawing is a cross sectional drawing.

FIG. 4 is a drawing schematically illustrating a structure of a platingdevice of an embodiment of the present invention.

FIG. 5 is an explanatory drawing of a structure of an ion exchangemembrane.

FIG. 6 is an explanatory drawing of permselectivity of the ion exchangemembrane.

FIG. 7 is a cross sectional drawing schematically illustrating aconventional face-down type jetting plating device.

FIG. 8 is a cross sectional drawing schematically illustrating aconventional rack-type vertical plating device.

FIG. 9 is a drawing schematically illustrating a structure of asemiconductor wafer used in the present invention.

FIG. 10( a) is a plan drawing schematically illustrating a semiconductorchip formed on a semiconductor wafer after a plating step.

FIG. 10( b) is a cross sectional drawing schematically illustrating thesemiconductor chip.

FIG. 11( a) is a cross sectional drawing schematically illustrating astructure of a part of a semiconductor chip before a seed layer formingstep of a method of the present invention for manufacturing asemiconductor wafer.

FIG. 11( b) is a cross sectional drawing schematically illustrating astructure of a part of a semiconductor chip after the seed layer formingstep of the method of the present invention for manufacturing asemiconductor wafer.

FIG. 11( c) is a cross sectional drawing schematically illustrating astructure of a part of a semiconductor chip after a photoresist applyingstep of the method of the present invention for manufacturing asemiconductor wafer.

FIG. 11( d) is a cross sectional drawing schematically illustrating astructure of a part of a semiconductor chip after a photoresist patternforming step of the method of the present invention for manufacturing asemiconductor wafer.

FIG. 11( e) is a cross sectional drawing schematically illustrating astructure of a part of a semiconductor chip after a plating step of themethod of the present invention for manufacturing a semiconductor wafer.

FIG. 11( f) is a cross sectional drawing schematically illustrating astructure of a part of a semiconductor chip after a stripping step ofthe method of the present invention for manufacturing a semiconductorwafer.

FIG. 11( g) is a cross sectional drawing schematically illustrating astructure of a part of a semiconductor chip after an etching step of themethod of the present invention for manufacturing a semiconductor wafer.

FIG. 12( a) is a cross sectional drawing schematically illustrating apart of a semiconductor chip having a wiring plating layer thereonbefore an overcoat layer forming step in an external connection terminalproviding step of providing a semiconductor wafer having the wiringplating layer thereon with an external connection terminal.

FIG. 12( b) is a cross sectional drawing schematically illustrating apart of a semiconductor chip after the overcoat layer forming step inthe external connection terminal providing step.

FIG. 12( c) is a cross sectional drawing schematically illustrating apart of a semiconductor chip after an overcoat layer pattern formingstep in the external connection terminal providing step.

FIG. 12( d) is a cross sectional drawing schematically illustrating apart of a semiconductor chip after an external connection terminalforming step in the external connection terminal providing step.

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1

With reference to FIGS. 1 to 6, the following explains an embodiment ofthe present invention.

FIG. 1 is a cross sectional drawing schematically illustrating astructure of a plating tank provided in a plating device of the presentembodiment. As shown in FIG. 1, a plating tank 100 includes: a waferholder 2 for holding a semiconductor wafer (substrate-to-be-plated) 1; acup 3; a plating solution jetting pipe 4; an anode 5; a supporter 6 forsupporting the anode 5; and a partition 7. The cup 3 includes aninternal cylinder 31 and an external cylinder 32.

The internal cylinder (second cylindrical cup) 31 and the externalcylinder (first cylindrical cup) 32 are cups each having substantially acylindrical shape, with its upper end open. The diameter of the internalcylinder 31 is smaller than the diameter of the external cylinder 32.The external cylinder 32 has at its lowest central part a platingsolution flowing-in port E through which a plating solution flows in.

The internal cylinder 31 has at its bottom the partition 7 having adonut shape, which separates the internal cylinder 31 from the externalcylinder 32. That is, the partition 7 is provided between asurface-to-be-plated W of the semiconductor wafer 1 and the anode 5, andseparates the anode 5 from the semiconductor wafer 1. Consequently, theplating tank 100 is divided into a substrate-to-be-plated chamber and ananode chamber. The “substrate-to-be-plate chamber” means a spacesurrounded by the internal cylinder 31 and the partition 7. The “anodechamber” means a space surrounded by the external cylinder 32 and thepartition 7.

As shown in FIG. 1, the plating solution jetting pipe 4 is provided soas to penetrate a hole at the center of the partition 7. The supporter 6is connected with the external cylinder 32 and has a structure throughwhich a plating solution flows. The anode 5 is provided on the supporter6. The anode 5 is positioned above the lower end of the plating solutionjetting pipe 4.

The partition 7 includes hydrocarbon cation exchange membrane. However,the partition 7 is not particularly limited as long as it includes apermeation member allowing metal ions in a plating solution flowing nearthe anode 5 and the supporter 6, that is, flowing in the anode chamber,to permeate the permeation member. For example, the partition 7 mayinclude an ion exchange membrane, a neutral membrane, a porous ceramics,etc. In the case where the partition 7 includes a hydrocarbon cationexchange membrane, examples of the hydrocarbon cation exchange membraneinclude SELEMION® (manufactured by ASAHI GLASS ENGENEERING Co., Ltd.,hydrocarbon cation exchange membrane) and NEOSEPTA CM-1® (manufacturedby ASTOM Corporation, hydrocarbon cation exchange membrane). Thestructure of the partition 7 is specifically explained later.

Furthermore, the partition 7 may allow not only metal ions but alsopositive ions (ions having the same electric nature as metal ions) whichare components of an additive to permeate the partition 7.

The plating solution jetting pipe 4 and the supporter 6 are made ofpolypropylene. The anode 5 is a soluble anode made of high phosphorouscopper. However, the plating solution jetting pipe 4 and the supporter 6are not particularly limited as long as they have dimensional stabilityand are resistive to a plating solution. For example, the platingsolution jetting pipe 4 and the supporter 6 may be made of hard vinylchloride.

The dimension of the semiconductor wafer 1 applicable to the presentinvention may be set according to the dimension of each member of theplating tank 100. For example, the diameter of the semiconductor wafer 1may range from approximately 100 mm to 500 mm. More specifically, thediameter may be approximately 150 mm.

The internal cylinder 31 has a bottom to which the partition 7 isattached and fixed. The internal diameter of the internal cylinder 31should be smaller than the surface-to-be-plated W of the semiconductorwafer 1.

In this way, when the internal diameter of the internal cylinder 31 issmaller than the surface-to-be-plated W of the semiconductor wafer 1, aplating solution jetted from the plating solution jetting pipe 4 isdirected to the surface-to-be-plated W of the semiconductor wafer 1without being exposed to the air. Consequently, the plating device ofthe present invention allows plating without exposure to the air. Thisprevents contamination of a plating solution due to floating foreignmatters in the air, evaporation of the plating solution, andcontamination of surrounding environments due to the evaporation or themist of the plating solution.

The height of the internal cylinder 31 may range from 50 mm to 100 mm.Here, the dimension of the internal cylinder 31 is as follows: theexternal diameter is 150 mm, the internal diameter is 140 mm, thethickness is 5 mm, and the height is 80 mm. The internal cylinder 31 hasa cylindrical shape.

As mentioned later, the height of the external cylinder 32 is notparticularly limited as long as the height allows the plating solutionfrom the plating solution jetting pipe 4 to sufficiently cover thesurface-to-be-plated W from its central part to its peripheral part andthe upper end of the external cylinder 32 is lower than the upper end ofthe internal cylinder. Here, the internal diameter of the externalcylinder 32 is 160 mm. The external cylinder 32 is designed such thatthe height of the external cylinder 32 allows the plating solution fromthe plating solution jetting pipe 4 to sufficiently reach the peripheralsurface of the semiconductor wafer 1 and the upper end of the externalcylinder 32 is lower than the upper end of the internal cylinder 31.

The external diameter of the internal cylinder 31 is 150 mm and theinternal diameter of the external cylinder 32 is 160 mm. The gap(plating solution flowing-out port) between the internal cylinder 31 andthe external cylinder 32 is 5 mm. However, the gap between the internalcylinder 31 and the external cylinder 32 is not limited to this. Bynarrowing the gap between the internal cylinder 31 and the externalcylinder 32, it is possible to increase a difference between the heightsof the upper ends of the internal cylinder 31 and the external cylinder32, which will be mentioned later. By narrowing the gap between theinternal cylinder 31 and the external cylinder 32, resistance (pressure)increases due to viscosity of the plating solution. Consequently, evenwhen the internal cylinder is made to have higher height, the platingsolution reaches to the upper end of the internal cylinder. As a result,flexibility in designing the plating device increases.

The partition 7 has a donut shape whose external diameter is 140 mm andinternal diameter is 40 mm. The external periphery of the partition 7 isattached to the internal cylinder 31 and the internal periphery of thepartition 7 is attached to the plating solution jetting pipe 4, so thatthe partition 7 is fixed. However, the dimension of the partition 7 isnot limited to this.

The supporter 6 is provided between the external cylinder 32 and theplating solution jetting pipe 4. The supporter 6 is provided above thebottom of the external cylinder 32 so that the gap between the supporter6 and the bottom of the external cylinder 32 ranges from at least 5 mmto 20 mm. The supporter 6 has multiple penetrating holes in a verticaldirection.

The thickness of the partition 7 preferably ranges from 50 μm to 200 μm,more preferably ranges from 50 μm to 100 μm. When the thickness of thepartition 7 is smaller than 50 μm, an electric current for plating isrequired more than necessary, which deteriorates efficiency in plating.When the thickness of the partition 7 is larger than 200 μm, a blackdefective appearance called “discoloration” is seen on the platedsurface.

Attachment of the partition 7 to the internal cylinder 31 makes a cupmember whose thickness is 2 to 10 mm and whose opening is a circle witha diameter of 0.2 to 9 mm or a square, a rectangle, or a quadrangle witha side of 0.2 to 9 mm. The partition 7 (SELEMION partition) is notnecessarily a perfect circle. The partition 7 may be a quadrangle at theextreme.

The dimension of the anode 5 made of high phosphorous copper is asfollows: the external diameter is 150 mm, the internal diameter is 50mm, and the thickness is 8 m. However, the dimension of the anode 5 isnot limited to this. The dimension may be any value as long as thedimension does not prevent the plating solution from flowing through thegap between the supporter 6 and the partition 7 and the gap between theexternal cylinder 32 and the anode 5. High phosphorous copper in theanode 5 is not particularly limited as long as it includes 0.04 to 0.06%of phosphorous.

The plating solution jetting pipe 4 penetrates the partition 7 andextends above the partition 7 by 20 mm. However, the plating solutionjetting pipe 4 is not limited to this as long as the plating solutionjetting pipe 4 extends from under the anode 5 to the partition 7.

The dimensions and other factors of the semiconductor wafer 1, the cup 3(the internal cylinder 31 and the external cylinder 32), the platingsolution jetting pipe 4, the anode 5, the supporter 6, and the partition7 in the plating tank 100 were explained above. The dimensions of themembers in the plating tank 100 may be set according to the dimension ofthe plating tank 100 or the dimension of the semiconductor wafer 1applied to the plating tank 100.

With reference to FIG. 2, the following specifically explains astructure of the wafer holder 2 for holding the semiconductor wafer 1.FIG. 2 is a cross sectional drawing illustrating an example of thestructure of the wafer holder 2 in the plating tank 100. As shown inFIG. 2, the wafer holder 2 includes an O ring 21, contact members 22,and a wafer holding ring 23. The wafer holding ring 23 is held by asupporter (not shown) so that there exists a predetermined gap betweenthe upper part of the internal cylinder 31 and the wafer holding ring23. The O ring 21 and the contact members 22 are provided on the waferholding ring 23 and keep attachment to the semiconductor wafer 1 to beheld.

Three contact members 22 are provided on a peripheral part of thesemiconductor wafer 1 with the same distance among them. However, thenumber of the contact members 22 is not limited to three. Four or morecontact members 22 may be provided on the peripheral part of thesemiconductor wafer 1 with the same distance between them. Furthermore,the contact member 22 may attach to the whole peripheral part of thesemiconductor wafer 1.

The internal diameter of the wafer holding ring 23 is 140 mm, but notlimited to this. The wafer holding ring 23 does not necessarily have acircular shape. The wafer holding ring 23 may be integral with a mainbody of the device.

The following explains the members of the wafer holder 2.

The O ring 21 is not particularly limited as long as it keeps attachmentto the semiconductor wafer 1 and is resistive to a plating solution. TheO ring 21 may be made of silicone gum for example. A specific example isViton® (manufactured by Dupont Dow Elastomers Japan).

The contact member 22 is not particularly limited as long as it keepsattachment to the semiconductor wafer 1, it is conductive, and it isresistive to a used plating solution. The contact member 22 may be madeof titan with metal plating for example. Specifically, examples of thecontact member 22 include titan with platinum plating, titan with goldplating, resin with gold plating etc, and combinations thereof.

The wafer holding ring 23 is not particularly limited as long as it hasdimensional stability and is resistive to a plating solution. The waferholding ring 23 may be made of hard vinyl chloride or polypropylene forexample.

With reference to FIG. 3, the following explains an example of thestructure of the partition 7 provided between the surface-to-be-plated Wof the semiconductor wafer 1 and the anode 5. FIG. 3 illustrates thestructure of an area (substrate-to-be-plated chamber) surrounded by theinternal cylinder 31 and the partition 7 in the plating tank 100. Theupper drawing is a top plan drawing seen from the surface-to-be-plated Wof the semiconductor wafer 1. The lower drawing is a cross sectionaldrawing.

As illustrated in FIG. 3, the partition 7 has a donut shape seen fromthe surface-to-be-plated W. The plating solution jetting pipe 4penetrates the central part of the partition 7. The periphery of thepartition 7 is fixed with the bottom of the internal cylinder 31.

The partition 7 includes a semipermeable membrane (permeation member) 71and semipermeable membrane supporters 72 and 73. The partition 7 is madeby the semipermeable membrane supporters 72 and 73 holding thesemipermeable membrane 71 between them. The semipermeable membranesupporter 72 is positioned at the anode 5 side and the semipermeablemembrane supporter 73 is positioned at the surface-to-be-plated W sideof the semiconductor wafer 1.

By electrifying between the semiconductor wafer 1 and the anode 5, theplating solution having flowed to the anode 5 permeates thesemipermeable membrane supporter 72. Metal ions of the plating solutionpermeate the semipermeable membrane 71. The metal ions permeate thesemipermeable membrane supporter 73 and flows toward thesurface-to-be-plated W (into the substrate-to-be-plated chamber) of thesemiconductor wafer 1. At that time, the metal ions of the platingsolution permeate the semipermeable membrane 71, but particles of theplating solution do not permeate the semipermeable membrane 71.Consequently, the partition 7 allows for separation of metal ions andparticles in the plating solution. This prevents particles due to theanode 5 from contaminating the surface-to-be-plated.

The semipermeable membrane 71 is not particularly limited as long asmetal ions of the metal solution can permeate the semipermeable membrane71 when the semipermeable membrane 71 is immersed in the platingsolution. Examples of the semipermeable membrane 71 include ahydrocarbon cation exchange membrane, a neutral membrane, and porousceramics. In the case where the semipermeable membrane 71 is ahydrocarbon cation exchange membrane, specific examples of thesemipermeable membrane 71 include SELEMION® (manufactured by ASAHI GLASSENGENEERING Co., Ltd., hydrocarbon cation exchange membrane) andNEOSEPTA CM-1® (manufactured by ASTOM Corporation, hydrocarbon cationexchange membrane).

The semipermeable membrane supporters 72 and 73 are not particularlylimited as long as they are permeated by a plating solution, they havedimensional stability, and they are resistive to the plating solution.Examples of materials of the semipermeable membrane supporters 72 and 73include polypropylene and hard vinyl chloride.

The following explains a structure of the semipermeable membrane 71using an ion exchange membrane including an ion exchange membrane as anexample. FIG. 5 is an explanatory drawing of a structure of the ionexchange membrane. FIG. 6 is an explanatory drawing of permselectivityof the ion exchange membrane.

As illustrated in FIG. 5, the “ion exchange membrane” is a membranewhich selectively allows ions to permeate it. The ion exchange membraneis roughly classified into a positive ion exchange membrane and anegative ion exchange membrane. As illustrated in FIG. 5, when thepositive ion exchange membrane immersed in the plating solution iselectrified, the positive ion exchange membrane selectively allowspositive ions (M⁺) to permeate it and does not allow negative ions (B⁻)to permeate it.

As illustrated in FIG. 6, substituents with negative electric charge arefixed with the positive ion exchange membrane. Consequently, thenegative ions (B⁻) are repulsed by the substituents with negativeelectric charge and accordingly cannot permeate the positive ionexchange membrane. On the other hand, the positive ions (M⁺) are notrepulsed by the substituents with negative electric charge andaccordingly can permeate the positive ion exchange membrane. That is,only the positive ions (M⁺) can permeate the positive ion exchangemembrane.

In contrast, the negative ion exchange membrane has the oppositefunction. Selective permeation in these ion exchange membranes is causedby electric energy of an electrodialyzer. The electric energy of theelectrodialyzer is not particularly limited. The electric energy may bederived from a direct current, a pulse current, or an alternativecurrent.

With reference to FIG. 4, the following explains a structure of aplating device of the present invention. FIG. 4 is a drawingschematically illustrating a structure of the plating device of thepresent invention.

As illustrated in FIG. 4, the plating device of the present inventionincludes: the plating tank 100; a plating solution tank 8 for containingthe plating tank 100 therein; the plating solution storage tank 9 forsupplying a plating solution; a pump 10 for circulating the platingsolution through the plating device; a filter 11 for filtering solidforeign matters in the plating solution; and a pipe T connecting thesemembers.

In the plating device of the present invention, a plating solution inthe plating solution storage tank 9 is supplied by the pump 10, via thefilter 11, to a plating solution flowing-in port E provided at the lowerpart of the plating tank 100. The plating solution is supplied from theplating solution flowing-in port E, flows through the plating solutionjetting pipe 4, and reaches the surface-to-be-plated W of thesemiconductor wafer 1. Thereafter, the plating solution leaks from aborder of the upper part of the internal cylinder 31 (a space betweenthe wafer holder 2 and the internal cylinder 31) to the outside of theplating tank 100, is recovered into the plating solution tank 8, andreturns to the plating solution storage tank 9.

The plating solution tank 8, the plating solution storage tank 9, andthe pipe T are not particularly limited as long as they have dimensionalstability and are resistive to a used plating solution. Examples ofmaterials of them include hard vinyl chloride and polypropylene.

Further, the pump 10 is not particularly limited as long as it isresistive to a used plating solution and causes the plating solution toflow without having a bad influence on the plating solution. Examples ofthe pump 10 include magnet pump MD-70R (manufactured by IWAKI CO., LTD.)and magnet pumps MD-30R and MD-100R (manufactured by IWAKI CO., LTD.).The material of the pump 10 is not particularly limited as long as ithas dimensional stability and is resistive to a used plating solution.The pump 10 may be made of hard vinyl chloride or polypropylene forexample.

The filter 11 is not particularly limited as long as the filter 11 has100% collection efficiency of particles whose grain size corresponds toapproximately ½ of the minimum gap of a target plating pattern, thefilter 11 is resistive to a used plating solution, and the filter 11allows the plating solution to flow without a bad influence on theplating solution. Examples of the filter 11 include: polypropylenecartridge filter HDCII (J012; 100% collection efficiency of 1.2 μm sizeparticles) manufactured by Japan Pall Corporation; polypropylenecartridge filter HDCII (J006; 100% collection efficiency of 1.0 μm sizeparticles) manufactured by Japan Pall Corporation; a Teflon® filter; anda hollow fiber membrane filter. Material of the filter 11 is notparticularly limited as long as the material has dimensional stabilityand is resistive to a used plating solution. Examples of the materialinclude hard vinyl chloride and polypropylene.

Although not shown in FIG. 4, a valve, a flow meter, an air vent pipeetc. are connected in the course of a pipe T. A flow of a platingsolution can be controlled by a controller (not shown). A voltage can beapplied between a surface-to-be-plated and the anode 5 by a power sourcefor plating (not shown).

As an example of plating in the plating device of the present invention,the following details a case where copper plating is performed on thesurface-to-be-plated W of the semiconductor wafer 1.

The semiconductor wafer 1 is placed on the wafer holder 2 so that thesurface-to-be-plated W of the semiconductor wafer 1 faces downward. Thesemiconductor wafer 1 is attached to the O ring 21 and the contactmember 22 by a wafer suppressor (not shown).

As shown in FIG. 4, a plating solution in the plating solution storagetank 9 is supplied to the filter 11 by the pump 10 controlled by thecontroller (not shown). The filter 11 removes, from the platingsolution, foreign matters which are larger than mesh size of the filter11. The plating solution flows into the plating solution flowing-in portE of the plating tank 100 through the pipe. The plating solution havingflowed from the plating solution flowing-in port E at the bottom of theexternal cylinder 32 of the cup 3 flows into the internal cylinder 31through the plating solution jetting pipe 4. The plating solution is acopper plating solution including an additive and copper which isequivalent to approximately 25 g/L of copper metal (MICROFAB Cu200;manufactured by Electroplating Engineers of Japan).

A part of the plating solution having flowed into the plating solutionflowing-in port E flows into a space between the bottom of the externalcylinder 32 and the supporter 6. The plating solution flowing in the gapbetween the bottom of the external cylinder 32 and the supporter 6(hereinafter referred to as the plating solution flowing in the anodechamber) flows through penetrating holes in the supporter 6, flowsupward while enveloping the anode 5, and flows along the partition 7toward the outer periphery. The anode 5 in the plating device includeshigh phosphorous copper whose phosphorous is approximately 0.04 to0.06%.

On the other hand, the plating solution flowing into the internalcylinder 31 via the plating solution jetting pipe 4 (hereinafterreferred to as the plating solution flowing into thesurface-to-be-plated chamber) has a higher pressure due to kineticenergy of the plating solution and due to a resistance which is causedwhen the plating solution flowing in the anode chamber flows out of theplating tank 100 through the gap (plating solution flowing-out port)between the internal cylinder 31 and the external cylinder 32.Consequently, a liquid level of the plating solution having flowed inthe substrate-to-be-plated chamber reaches the surface-to-be-plated W ofthe semiconductor wafer 1. Then, the plating solution flows toward theperiphery of the surface-to-be-plated W of the semiconductor wafer 1.Then, the solution flows out of the plating tank 100 via the gap betweenthe internal cylinder 31 and the wafer holding ring 23.

The plating solution having flowed out of the plating tank 100 via thegap between the internal cylinder 31 and the external cylinder 32 andthe plating solution having flowed out of the plating tank 100 via thegap between the internal cylinder 31 and the wafer holding ring 23 aremixed with each other and are supplied to the plating solution tank 8.The plating solution in the plating solution tank 8 returns to theplating solution storage tank 9 by a vertical interval.

At that time, a voltage is applied between the anode 5 and thesurface-to-be-plated W, serving as a cathode, of the semiconductor wafer1 while controlling an electric current by the power source for plating(not shown). Consequently, an additive in the plating solution works ina predetermined manner on the surface of the anode 5, resulting ingeneration of copper ions. The generated metal ions permeate thepartition 7 and reach, via the inside of the internal cylinder 31, thesurface of the semiconductor wafer 1 serving as a cathode. The additivein the plating solution works in a predetermined manner on thesurface-to-be-plated W of the semiconductor wafer 1 and accordinglycopper ions are deposited as copper and the surface-to-be-plated W isplated with copper.

In the plating device of the present invention, the flow rate of theplating solution supplied by the pump 10 to the filter 11 can be setaccording to the dimension of the semiconductor wafer 1 or to thedimension of the plating tank 100. Specifically, the flow rate isapproximately 20 L per minute or approximately 2 to 20 L per minute.

Furthermore, a voltage to be applied between the surface-to-be-plated Wand the anode 5 and a time for applying a voltage can be set accordingto the dimension of the semiconductor wafer 1 or to the dimension of theplating tank 100. Specifically, a voltage is applied for 25 minuteswhile controlling an electric current so that current density of thesurface-to-be-plated W is 20 mA per 1 cm².

The internal cylinder 31 is filled with the plating solution which haspassed through the filter 11 and has removed solid foreign matterslarger than mesh size of the filter. The plating solution having flowedinto the anode chamber cannot flow into the internal cylinder 31 due tothe partition 7 and the flow of the plating solution. Only copper ionsin the plating solution permeate the partition 7 and reach the inside ofthe internal cylinder 31. Consequently, minute solid foreign mattersderived from black film etc. on the surface of the anode 5 do not attachthe plated surface. Furthermore, unlike conventional examples, it isunnecessary to use an insoluble electrode so as to prevent attachment ofminute solid foreign matters derived from a black film etc.Consequently, it is possible to obtain high-quality plating without anincrease in consumption of an additive due to oxidative decomposition ofthe additive in the plating solution and without deterioration inplating quality due to contamination of the plating solution bydecomposition product.

In the above example, a copper plating solution (MICROFAB Cu200;manufactured by Electroplating Engineers of Japan) was used. However, aplating solution in the present embodiment is not limited to this aslong as it allows a desired effect.

Explanations were made above as to a case where the partition 7 in theplating device of the present invention is partially or entirely made ofa permeation member which allows metal ions in the plating solution topermeate the permeation member. However, the plating device is notlimited to this case. The plating device of the present invention may bearranged so that: the internal cylinder 31 whose bottom is the partition7 has a portion separating the surface-to-be-plated W of thesemiconductor wafer 1 from the anode 5 and the portion is partially orentirely made of a permeation member which allows metal ions in theplating solution to permeate the permeation member. That is, thesubstrate-to-be-plated chamber has a portion separating the anode fromthe substrate-to-be-plated and the portion is partially or entirely madeof a permeation member which allows metal ions in the plating solutionto permeate the permeation member. For example, the internal cylinder 31may be partially or entirely made of such permeation member.

In the face-down type plating device, the plating solution flowingupward from the lower part of the cup flows out of the cup through thegap between the cup and the wafer holder. At that time, a rise of aliquid level by increasing a flow rate of the plating solution iscombined with surface tension (hydrophilicity) of the plating solutionwith the semiconductor wafer, allowing the plating solution to flowtoward the periphery of the cup and flow out of the cup, together withwetting the surface-to-be-plated of the semiconductor wafer which ispositioned above the gap.

Here, it is very important to form an even flow of the plating solutionon a whole surface-to-be-plated of the semiconductor wafer. Therefore,finish of plating is greatly influenced by whether a laminar flow ismade from a center to peripheral of the surface.

In a conventional face-down type plating device, providing a partitionbetween an anode and a semiconductor wafer would prevent a platingsolution from touching the wafer, which would make plating impossible.

In order to solve the problem, the present invention is designed suchthat: the structure of a cup is changed from a conventional structure toa double structure including an internal cylinder and an externalcylinder, a plating solution jetting pipe is provided so as to penetratea partition from under an anode toward a wafer, the port of the pipedivides a plating solution into two: a solution which reaches thesurface of the wafer and takes part in plating the surface; and asolution which flows near the anode and is drained out of the cup. Thisallows the plating solution to flow on the surface of the wafer from thecenter of the wafer with enough flow speed and flow rate and to form alaminar flow, while allowing the plating solution to flow near theanode, to flow along the partition, and to flow out of the cup.

A conventional face-up type jet plating device is designed such that awafer is rotated so that a flow of a plating solution is evenly formed,via a side flowing-in port/flowing-out port, on a whole surface of asemiconductor wafer to be plated. For that reason, the conventionalface-up type jet plating device requires not only a mechanism forholding a semiconductor wafer but also a mechanism for rotating thesemiconductor wafer, resulting in a large-scale device.

In contrast, the plating device of the present invention can flow theplating solution from the center of the semiconductor wafer.Consequently, the plating tank and the semiconductor wafer are fixedwith each other, realizing a simpler structure.

The plating device of the present invention may be expressed as aface-down type jet plating device for plating a substrate, wherein ananode and a surface-to-be-plated are positioned to be separated fromeach other in a plating cup. The plating device supplies a platingsolution into the plating cup.

As a result, in the plating method in which the plating device causesthe plating solution to flow into the plating cup and to touch thesurface-to-be-plated while electrifying between the anode in the platingcup and the surface-to-be-plated, the plating solution having flowed tothe neighbor of the anode in the plating cup does not reach thesurface-to-be-plated by the flow of the plating solution. Alternatively,in the method, the plating solution having flowed into the neighbor ofthe anode in the plating cup can flow out of the cup without reachingthe surface-to-be-plated.

The plating device is designed such that: a structure for separating theanode from the surface-to-be-plated in the plating cup is partially orentirely made of a material which, when immersed in an electrolyticsolution, allows ions to permeate the material. Examples of the materialinclude a semipermeable membrane, an ion exchange membrane and othermaterials.

The plating device is designed such that the plating solution is aconductive solution including copper or a conductive solution in whichother component is added to the conductive solution including copper.Further, the plating solution includes 14 to 40 g of copper component ascopper metal in 1 litter of the plating solution. In the plating device,the anode is a soluble anode plate made of high phosphorous copper.

Embodiment 2

With reference to FIGS. 9 to 12, the present embodiment will detail thesemiconductor wafer 1 used as a substrate to be plated in Embodiment 1and a method for manufacturing the substrate. They are examples of asemiconductor device and a method for manufacturing the semiconductordevice. FIG. 9 is a drawing schematically illustrating a structure ofthe semiconductor wafer 1 used in the present embodiment. FIG. 10 is adrawing schematically illustrating a structure of a semiconductor chip33 formed on the semiconductor wafer 1 after a plating step. FIG. 10( a)is a plan drawing. FIG. 10( b) is a cross sectional drawing.

As illustrated in FIG. 9, a plurality of semiconductor chips 41 areformed on a surface of the semiconductor wafer 1. A contact section 42is provided on the periphery of the semiconductor wafer 1. The contactsection 42 includes a plating seed layer (not shown) which is exposed.The contact section 42 touches the contact member 22 illustrated in FIG.2.

As illustrated in FIG. 10( a), the semiconductor chip 41 includes aphotoresist layer 18 which may have any shape. As illustrated in FIG.10( b), the semiconductor chip 41 after a plating step has a seed layer19 on its surface. The seed layer 19 has, on its surface, a wiringplating layer 16 and the photoresist layer 18. A pad 17 is formed on theseed layer 19 so as to be opposite to the wiring plating layer 16 andthe photoresist layer 18. In the semiconductor chip 41, the wiringplating layer 16 and the pad 17 are electrically connected with eachother.

With reference to FIG. 11, the following explains procedures of themethod of the present embodiment for manufacturing a semiconductordevice. FIG. 11 is a cross sectional drawing which illustrates theprocedures.

As illustrated in FIG. 11, the method of the present embodiment formanufacturing a semiconductor device includes: a seed layer forming stepof forming the seed layer 19 on the surface of the semiconductor chip41; a photoresist applying step of applying the photoresist layer 18 onthe seed layer 19; a photoresist pattern forming step of forming anypattern on the photoresist layer 18; a plating step of plating thephotoresist pattern with metal so that a wiring plating layer is formed;a stripping step of stripping off the photoresist layer 18; and anetching step of etching the seed layer 19. FIG. 11( a) is a drawingschematically illustrating a partial structure of the semiconductor chip41 before the seed layer forming step. FIG. 11( b) is a drawingschematically illustrating a partial structure of the semiconductor chip41 after the seed layer forming step. FIG. 11 (c) is a drawingschematically illustrating a partial structure of the semiconductor chip41 after the photoresist applying step. FIG. 11( d) is a drawingschematically illustrating a partial structure of the semiconductor chip41 after the photoresist pattern forming step. FIG. 11( e) is a drawingschematically illustrating a partial structure of the semiconductor chip41 after the plating step. FIG. 11( f) is a drawing schematicallyillustrating a partial structure of the semiconductor chip 41 after thestripping step. FIG. 11( g) is a drawing schematically illustrating apartial structure of the semiconductor chip 41 after the etching step.

As illustrated in FIG. 11( a), the semiconductor chip 41 before the seedlayer forming step has the pad 17 formed thereon via which an electricsignal is exchanged with the outside.

As illustrated in FIG. 11( b), in the seed layer forming step, the seedlayer 19 is formed on the surface of the semiconductor chip 41.Specifically, the semiconductor wafer 1 including the semiconductor chip41 is positioned in a sputtering device so that the seed layer is formedon the surface where the pad is formed. Thereafter, 1000 Å of a titanlayer serving as barrier metal is formed on the surface of thesemiconductor wafer 1 and then 3000 Å of a copper layer is formed on thesurface.

The copper layer serves as the seed layer 19 for plating. The seed layer19 serves to promote growth of a plating member (wiring plating layer16) in the plating step which will be mentioned later.

In the above example, the titan layer serving as barrier metal is formedin the seed layer forming step. However, the layer serving as barriermetal is not limited to this. The layer may be a chrome layer or a layermade of an alloy of titan and tungsten. Further, the layer may be anylayer as long as it is made of metal which assures a barrier effect.

Further, the thickness of the titan layer is not limited to 1000 Å. Thethickness may have any value of not less than 500 Å as long as the titanlayer assures a barrier effect. Further, the thickness of the copperlayer serving as the seed layer 19 for plating is not limited to 3000 Å.The thickness may have any value of not less than 1000 Å as long as thecopper layer assures even current density in the plating step.

As illustrated in FIG. 11( c), in the photoresist applying step, thephotoresist layer 18 is applied on the semiconductor wafer 1 includingthe semiconductor chip 41 having the seed layer 19 thereon. In thephotoresist applying step, photoresist (PMER P-LA900; manufactured byTOKYO OHKA KOGYO CO., LTD.) is spin-coated on the surface of thesemiconductor wafer 1 by a spin coater for 30 seconds at 1500 rotationsper minute, and then is heated at 115° C. for 5 minutes.

In the above example, PMER P-LA900 is used as photoresist. However,photoresist is not limited to this as long as it is resistive to theplating step which will be mentioned later. An example of photoresist isPMER N-CA3000 (manufactured by TOKYO OHKA KOGYO CO., LTD.). Further, themethod for applying photoresist is not limited to spin-coating. Forexample, the photoresist layer 18 may be formed on the surface of thesemiconductor wafer 1 by using a dry film such as ORDYL MP100 Series(manufactured by TOKYO OHKA KOGYO CO., LTD.).

In the photoresist applying step, photoresist is spin-coated by a spincoater for 30 seconds at 1500 rotations per minute and heated at 115° C.for 5 minutes. However, the spin-coating method is not limited to this.

For example, photoresist may be spin-coated at 1000 to 3000 rotationsper minute so that photoresist has a sufficiently even thickness, andthen the photoresist is heated at 100 to 120° C. for 5 minutes or so.

As illustrated in FIG. 11( d), in the photoresist pattern forming step,a pattern having any shape is formed on the photoresist layer 18 formedin the photoresist applying step. Specifically, after the photoresistapplying step, the semiconductor wafer 1 including the semiconductorchip 41 is set in a photolithography machine (not shown). Then, g-ray(436 nm) is irradiated to the photoresist layer 18. Thereafter, adeveloping device (not shown) develops the photoresist layer 18 using2.38%-TMAH aqueous solution, so that photoresist on a portion to besubjected to wiring plating is removed.

In the above example, g-ray (436 nm) is irradiated to the photoresistlayer 18. However, the ray irradiated to the photoresist layer 18 forexposure is not limited to this as long as the ray allows photoresist tobe exposed. Examples of the ray to be irradiated to the photoresistlayer 18 include i-ray (365 nm) and deep ultraviolet ray (approximately200 to 300 nm). Further, in the photoresist pattern forming step, thephotoresist layer 18 is developed using 2.38%-TMAH aqueous solution.However, the concentration of the TMAH aqueous solution is not limitedto this. For example, the concentration may be 1 to 3%. Alternatively,25%-TMAH aqueous solution may be diluted with pure water so that thesolution has concentration appropriate for development.

As illustrated in FIG. 11( e), in the plating step, plating is performedon a portion where the seed layer 19 is exposed as a result of forming apattern having any shape on the photoresist layer 18 in the photoresistpattern forming step. Specifically, after the photoresist patternforming step, the semiconductor wafer 1 including the semiconductor chip41 is positioned in a plating device illustrated in FIG. 1. That is, thesemiconductor wafer 1 is positioned on the wafer holder 2 in the platingdevice. Then, the O ring 21 and the contact member 22 are attached tothe contact member 42 of the semiconductor chip 41 by a wafer suppressor(not shown). The plating step after the semiconductor wafer 1 has beenpositioned in the plating device is the same as the plating methodexplained in Embodiment 1 and therefore the explanation of the platingstep is omitted here.

In the stripping step, as illustrated in FIG. 11( f), the photoresistlayer 18 on the semiconductor chip 41 after the plating step isstripped. Specifically, the semiconductor wafer 1 including thesemiconductor chip 41 in FIG. 11( e) is provided in a stripping device(not shown). Then, the semiconductor wafer 1 is immersed in a strippingsolution (stripping solution 104; manufactured by TOKYO OHKA KOGYO CO.,LTD.) at 70° C. for 20 minutes and shaken occasionally. Consequently,the photoresist layer 18 formed on the surface of the semiconductorwafer 1 is stripped.

In the above example, the semiconductor wafer 1 is immersed in thestripping solution 104 at 70° C. for 20 minutes and shaken occasionally.However, the time for immersion is not limited to this. For example, thetime may be 15 to 25 minutes. Further, the semiconductor wafer 1 may beimmersed in R-100 (manufactured by MITSUBISHI GAS CHEMICAL COMPANY,INC.) for example as a stripping solution and shaken occasionally.Alternatively, acetone may be used as a stripping solution.

In the etching step, as illustrated in FIG. 11( g), the seed layer 19which does not have the wiring plating layer 16 thereon is removed byetching. Specifically, the semiconductor wafer 1 including thesemiconductor chip 41 illustrated in FIG. 11( f) is provided in anetching device (not shown). Then, the semiconductor wafer 1 is immersedand shaken in 10%-ammonium persulfate aqueous solution at 25° C. for 1.5minute, so as to etch the seed layer 19 made of copper (Cu) other thanthe copper plating wiring section (wiring plating layer 16) (so as toetch the seed layer 19 which does not have the wiring plating layer 16thereon).

In the above example, in the etching step, the semiconductor wafer 1 isimmersed and shaken in 10%-ammonium persulfate aqueous solution at 25°C. for 1.5 minute. However, the aqueous solution for etching is notlimited to this. For example, the aqueous solution may be 10%-sodiumhydroxide aqueous solution, 40%-iron chloride aqueous solution, or othersolution. The temperature of the aqueous solution is not limited to thisand may be 15 to 40° C.

Further, in the etching step, the semiconductor wafer 1 is subsequentlyimmersed and shaken in 25%-TMAH at 90° C. for 1 hour. Consequently, thetitan layer serving as barrier metal (not shown) other than the copperplating wiring section (wiring plating layer 16) (the titan layer whichdoes not have the wiring plating layer 16 thereon) is etched.

In the above example, the semiconductor wafer 1 is immersed and shakenin 25%-TMAH at 90° C. for 1 hour so that the titan layer is etched.However, the aqueous solution for etching the titan layer is not limitedto this. For example, the aqueous solution may be a mixture of:hydrochloric acid; and hydrofluoric acid and nitric acid or othersolutions.

As described above, the semiconductor wafer 1 including thesemiconductor chip 41 manufactured through the seed layer forming stepto the plating step is allowed by the plating step to be free fromdeterioration in plating quality due to minute solid foreign mattersderived from a black film etc. Consequently, in the method of thepresent embodiment for manufacturing a semiconductor device, it ispossible to prevent short between wires or other problems due to minutesolid foreign matters derived from a black film etc. As a result, it ispossible to form a more minute wiring pattern on the surface of asemiconductor chip.

Further, the semiconductor chip 41 which has the wiring plating layer 16thereon and which is formed on the semiconductor wafer 1 is providedwith an external connection terminal. With reference to FIG. 12, thefollowing details an external connection terminal providing step ofproviding the semiconductor chip 41 having the wiring plating layer 16thereon with the external connection terminal. FIG. 12 is a crosssectional drawing illustrating the external connection terminalproviding step.

The external connection terminal providing step includes: an overcoatlayer forming step of forming an overcoat layer on the surface of thesemiconductor chip 41 having the wiring plating layer 16 thereon; anovercoat layer pattern forming step of forming any pattern on theovercoat layer; and an external connection terminal forming step offorming the external connection terminal on the wiring plating layer 16in line with the pattern of the overcoat layer. FIG. 12( a) is a drawingschematically illustrating a partial structure of the semiconductor chip41 having the wiring plating layer 16 thereon before the overcoat layerforming step. FIG. 12( b) is a drawing schematically illustrating apartial structure of the semiconductor chip 41 after the overcoat layerforming step. FIG. 12( c) is a drawing schematically illustrating apartial structure of the semiconductor chip 41 after the overcoat layerpattern forming step. FIG. 12( d) is a drawing schematicallyillustrating a partial structure of the semiconductor chip 41 after theexternal connection terminal forming step.

As illustrated in FIG. 12( a), in the semiconductor chip 41 which hasthe wiring plating layer 16 thereon and which is formed on thesemiconductor wafer 1, the seed layer 19 is positioned below the wiringplating layer 16 (the seed layer 19 is positioned at the side where thepad 17 is positioned). The wiring plating layer 16 is electricallyconnected, via the seed layer 19, with the pad 17 formed on thesemiconductor chip 41.

As illustrated in FIG. 12( b), in the overcoat layer applying step, theovercoat layer 20 is formed on the semiconductor wafer 1 including thesemiconductor chip 41 having the wiring plating 16 thereon.Specifically, the overcoat layer 20 (CRC-8000; manufactured by SUMITOMOBAKELITE CO., LTD.) is spin-coated by a spin coater for 30 seconds at1500 rotations per minute and is heated at 130° C. for 5 minutes.

In the above example, in the overcoat layer applying step, CRC-8000series is used as the overcoat layer 20. However, the material for theovercoat layer 20 is not limited to this. For example, the material maybe HD-8800 series (manufactured by Hitachi Chemical). Further, theovercoat layer 20 may be a photosensitive heat-resistive resin such asHD8000.

In the above overcoat layer applying step, the overcoat layer isspin-coated by the spin coater for 30 seconds at 1500 rotations perminute and is heated at 130° C. for 5 minutes. However, the method forapplying the overcoat layer is not limited to this. For example, thesemiconductor wafer is rotated at 1000 to 3000 rotations per minute sothat the overcoat layer has sufficiently even thickness and then theovercoat layer is heated at 120 to 140° C. for approximately 5 minutes.

As illustrated in FIG. 12( c), in the overcoat layer pattern formingstep, any pattern is formed on the overcoat layer 20. Specifically, thesemiconductor wafer 1 including the semiconductor chip 41 is set in aphotolithography machine (not shown) after the overcoat layer applyingstep. The photolithography machine irradiates g-ray (436 nm) to theovercoat layer 20. Thereafter, a developing device (not shown) developsthe overcoat layer 20 using 2.38%-TMAH aqueous solution, so that theovercoat layer 20 corresponding to a portion where an externalconnection terminal is to be formed is removed. After the removal, thesemiconductor wafer 1 is subjected to a hardening process in a nitrogenatmosphere at 300° C. for 2 hours. With the overcoat layer patternforming step, the semiconductor chip 41 has the wiring plating layer 16exposed at a portion where the external connection terminal is to beformed.

In the above example, in the overcoat layer pattern forming step, thephotolithography machine irradiates g-ray (436 nm) to the overcoat layer20. However, the ray irradiated to the overcoat layer 20 is not limitedto this as long as the ray can expose the overcoat layer. Examples ofthe ray irradiated to the overcoat layer 20 include i-ray (365 nm) anddeep ultraviolet ray (approximately 200 to 300 nm).

In the overcoat layer pattern forming step, the overcoat layer 20 isdeveloped using 2.38%-TMAH aqueous solution. However, the concentrationof TMAH aqueous solution is not limited to this. For example, theconcentration may be 1 to 3%. Alternatively, 25%-TMAH aqueous solutionmay be diluted with pure water so as to have a concentration appropriatefor development.

In the overcoat layer pattern forming step, the overcoat layer 20corresponding to a portion where the external connection terminal is tobe formed is removed and then the semiconductor wafer 1 is subjected toa hardening process in a nitrogen atmosphere at 300° C. for 2 hours.However, the step after the removal of the overcoat layer is not limitedto this. For example, the step may be such that the semiconductor wafer1 is held at 250 to 350° C. for 1.5 to 3 hours after the removal of theovercoat layer. Further, a temperature-up process and a temperature-downprocess may be provided before and after the step, respectively.

As illustrated in FIG. 12( d), in the external connection terminalforming step, an external connection terminal 26 is formed at a portionwhere the overcoat layer 20 has been removed in the overcoat layerpattern forming step. Specifically, the semiconductor wafer 1 includingthe semiconductor chip 41 is positioned in a solder ball mounter (notshown). Then, flux (not shown) is applied on a portion where the wiringplating layer 16 is exposed and where the external connection terminalis to be formed. On the portion where the flux has been applied ismounted a solder ball serving as the external connection terminal 26which is held by a tool (not shown). Thereafter, the semiconductor wafer1 including the semiconductor chip 41 having the solder ball thereon isprovided in a reflow device at 245° C. and the solder ball is remeltedand cooled down, so that the solder ball serving as the externalconnection terminal 26 is attached to the wiring plating layer 16.

In the above example, the solder ball serving as the external connectionterminal 26 is made of SnAg_(3.0)Cu_(0.5) (M705; manufactured by SenjuMetal Industry Co., Ltd.). However, the solder ball is not limited tothis. For example, the solder ball may be made of Sn₆₃Pb₃₇.Alternatively, the solder ball may be made of other lead-free solder.

In the external connection terminal forming step, heating temperature ofthe reflow device is 245° C. However, the heating temperature is notlimited to this. For example, the heating temperature may be 240 to 250°C.

The present invention is not limited to the above embodiments, and avariety of modifications are possible within the scope of the followingclaims, and embodiments obtained by combining technical meansrespectively disclosed in the above embodiments are also within thetechnical scope of the present invention.

As described above, the plating device of the present invention isdesigned such that the plating tank includes a partition between thesubstrate-to-be-plated and the anode, the partition separates the anodefrom the substrate-to-be-plated, and the plating tank is divided into asubstrate-to-be-plated chamber and an anode chamber. Further, asdescribed above, in the plating method of the present invention, platingis performed while the substrate-to-be-plated and the anode areseparated from each other by the partition and the plating tank isdivided into the substrate-to-be-plated chamber and the anode chamber.Consequently, it is possible to prevent contamination of a platedsurface due to particles etc. made by the anode. As a result, it ispossible to prevent deterioration in plating quality due to minute solidparticles derived from a black film etc., without impairing operativity.

Further, as described above, in the method of the present invention formanufacturing a semiconductor device, in the plating step, plating isperformed while the anode and the surface-to-be-plated are separatedfrom each other in the plating tank by the partition. Further, thesemiconductor device of the present invention is manufactured throughthe method. Consequently, it is possible to obtain a semiconductordevice which is free from minute solid foreign matters derived from ablack film etc. on the surface of the anode and which has plated wiringwith high quality.

Further, it is preferable to arrange the plating device of the presentinvention so as to further include a plating solution jetting pipe forjetting the plating solution to the surface-to-be-plated of thesubstrate-to-be-plated, the plating solution jetting pipe being providedso as to penetrate the partition and so as to allow the plating solutionto flow into both the substrate-to-be-plated chamber and the anodechamber.

With the arrangement, the plating solution jetting pipe is provided soas to penetrate the partition and so as to allow the plating solution toflow into both the substrate-to-be-plated chamber and the anode chamber.Consequently, the plating solution flowing into the plating tank can bedivided into a laminar flow of the plating solution to the platedsubstrate area and a laminar flow of the plating solution to the anodechamber. As a result, when the plating solution flows into the platingtank, it is possible to jet the plating solution to thesurface-to-be-plated of the substrate-to-be-plated with sufficient flowspeed and flow rate.

An example of the structure allowing “the plating solution to flow intoboth the substrate-to-be-plated chamber and the anode chamber” is suchthat: the plating tank includes a first cylindrical cup and a secondcylindrical cup, the first cylindrical cup is provided with the anodeand has a bottom provided with a plating solution flowing-in port viawhich the plating solution flows into the plating tank, the secondcylindrical cup has a bottom which is the partition, and the platingsolution jetting pipe is provided so as to penetrate the partition andso as to allow a laminar flow of the plating solution from the platingsolution flowing-in port to be divided into a laminar flow of theplating solution to the first cylindrical cup and a laminar flow of theplating solution to the second cylindrical cup.

It is preferable to arrange the plating device of the present inventionso that the plating solution flowing into the anode chamber does notflow into the substrate-to-be-plated chamber.

With the arrangement, the plating solution having flowed into theplating tank is divided by the plating solution jetting pipe into theplating solution to the substrate-to-be-plated chamber and the platingsolution to the anode chamber. Electrification between the anode and thesubstrate-to-be-plated makes the plating solution having flowed into theanode chamber include particles derived from the anode. The platingsolution passes through the partition, thereby removing the particles.Consequently, the particles do not reach the surface-to-be-plated. As aresult, it is possible to prevent the particles from contaminating theplated surface.

Further, the plating device may be arranged so that the plating tankfurther includes a plating solution flowing-out port via which theplating solution having flowed into the anode chamber flows out of theplating tank.

Further, it is preferable to arrange the plating device of the presentinvention so that a portion which separates the anode from thesubstrate-to-be-plated and which includes the partition in the platingtank is partially or entirely made of a permeation member which, whenimmersed in the plating solution, allows ions in the plating solution topermeate the permeation member.

With the arrangement, when immersed in the plating solution, thepermeation member allows ions in the plating solution to permeate thepermeation member. Therefore, when a voltage is applied over the platingsolution, ions in the plating solution permeate the permeation member.On the other hand, particles derived from the anode do not permeate thepermeation member. Consequently, with the arrangement, it is possible toseparate ions from particles in the plating solution having flowed intothe anode chamber.

Further, the permeation member may be a semipermeable membrane.

Further, the permeation member may include an ion exchange membrane.

Further, it is preferable to arrange the plating device of the presentinvention so that the partition has a thickness ranging from 50 to 200μm.

Further, it is preferable to arrange the plating device of the presentinvention so that the partition includes a hydrocarbon cation exchangemembrane.

Further, it is preferable to arrange the plating device of the presentinvention so as to further include: a plating solution supplying sourcefor storing a plating solution to be supplied to the plating tank;plating solution supplying means for supplying the plating solutionstored in the plating solution supplying source to the plating tank; andplating solution filtering means for filtering the plating solutionsupplied by the plating solution supplying means, the plating solutionstored in the plating solution supplying source being supplied to theplating tank by the plating solution supplying means and via the platingsolution filtering means, and the plating solution supplied to theplating tank being supplied again to the plating solution supplyingsource.

Further, the plating solution preferably includes a copper component andis conductive.

There are various kinds of plating solutions for forming various metals.With the arrangement, by using the plating solution including a coppercomponent, it is possible to form copper plating on thesurface-to-be-plated of the substrate-to-be-plated. “Copper component”means copper metal, copper ions, or a composition including copper ions.

Further, it is preferable that the plating solution includes a coppercomponent of not less than 14 g and not more than 40 g per 1 litter ofthe plating solution.

Further, it is preferable that the anode is a soluble anode made of highphosphorous copper.

When an anode including pure copper is used, the amount of foreignmatters generated by the anode increases. On the other hand, with thearrangement, the anode is a soluble anode made of high phosphorouscopper, and accordingly a black film is formed on the surface of theanode. The black film traps copper complex ions (Cu⁺) which are causesof foreign matters.

Further, the substrate-to-be-plated may be a semiconductor wafer.

Further, it is preferable to arrange the method of the present inventionfor manufacturing a semiconductor device so that in the plating step, aflow of the plating solution is divided into a flow to thesurface-to-be-plated and a flow to a neighbor of the anode.

As a result, when the plating solution flows into the plating tank inthe plating step, it is possible to jet the plating solution to thesurface-to-be-plated of the substrate-to-be-plated with sufficient flowspeed and flow rate.

Further, it is preferable to arrange the method of the present inventionso that in the plating step, the plating solution having flowed to theneighbor of the anode does not flow to the surface-to-be-plated.

With the arrangement, the plating solution including particles generatedby electrifying between the anode and the substrate-to-be-plated doesnot reach the surface-to-be-plated of the substrate-to-be-plated.Consequently, it is possible to prevent the particles from contaminatingthe plated surface. Further, the method may be arranged so that in theplating step, the plating solution having flowed to a neighbor of theanode is caused to flow out of the plating tank.

Further, it is preferable to arrange the method of the present inventionso that a portion which separates the anode from thesubstrate-to-be-plated and which includes the partition in the platingtank is partially or entirely made of a permeation member which, whenimmersed in the plating solution, allows ions in the plating solution topermeate the permeation member.

With the arrangement, when a voltage is applied over the platingsolution, ions in the plating solution permeate the permeation member.On the other hand, particles derived from the anode do not permeate thepermeation member. Consequently, with the arrangement, it is possible toseparate ions from particles in the plating solution having flowed intothe anode chamber.

Further, the method of the present invention may be arranged so that thepermeation member is a semipermeable membrane.

Further, the method of the present invention may be arranged so that thepermeation member includes an ion exchange membrane.

Further, it is preferable to arrange the method of the present inventionso that the partition has a thickness of not less than 50 μm and notmore than 200 μm.

Further, it is preferable to arrange the method of the present inventionso that the partition includes a hydrocarbon cation exchange membrane.

Further, it is preferable to arrange the method of the present inventionso that the plating step includes the sub-steps of: (i) supplying aplating solution stored in a plating solution supplying source to theplating tank; (ii) filtering the plating solution supplied in thesub-step (ii); and (iii) supplying again the plating solution suppliedto the plating tank to the plating solution supplying source.

The sub-step (iii) is a sub-step in which: a plating solution suppliedfrom the plating solution supplying source in the sub-step (i) issubjected to the sub-step (ii) and is supplied to the plating tank andthen is supplied again to the plating solution supplying source.Specifically, the sub-step (iii) is a sub-step in which: in the platingdevice of the present invention, a plating solution stored in theplating solution supplying source is supplied to the plating tank by theplating solution supplying means and via the plating solution filteringmeans and the plating solution supplied to the plating tank is suppliedagain to the plating solution supplying source.

Further, it is preferable to arrange the method of the present inventionso that the plating solution includes a copper component and isconductive.

It is preferable that the plating solution includes a copper componentof not less than 14 g and not more than 40 g per 1 litter of the platingsolution.

Further, it is preferable to arrange the method of the present inventionso that the anode is a soluble anode made of high phosphorus copper.

Further, the method of the present invention may be arranged so that thesubstrate-to-be-plated is a semiconductor wafer.

Further, it is preferable to arrange the method of the present inventionso as to further include the steps of: (II) forming a seed layer on thesurface-to-be-plated; (III) applying photoresist on a surface of theseed layer formed in the step (II); and (IV) forming a pattern byexposing and developing the photoresist, the steps (II) to (IV) beingperformed before the plating step.

In order to solve the foregoing problems, the semiconductor device ofthe present invention is manufactured through the method formanufacturing a semiconductor device.

With the arrangement, the semiconductor device is manufactured throughthe method. Consequently, it is possible to provide a semiconductordevice which is free from minute solid foreign matters derived from ablack film etc. on the surface of the anode and which has plated wiringwith high quality.

The embodiments and concrete examples of implementation discussed in theforegoing detailed explanation serve solely to illustrate the technicaldetails of the present invention, which should not be narrowlyinterpreted within the limits of such embodiments and concrete examples,but rather may be applied in many variations within the spirit of thepresent invention, provided such variations do not exceed the scope ofthe patent claims set forth below.

INDUSTRIAL APPLICABILITY

As described above, the plating device of the present invention iscapable of preventing deterioration in plating quality due to minutesolid foreign matters derived from a black film etc., without impairingoperativity. Therefore, the present invention is applicable to thesemiconductor industry.

1-32. (canceled)
 33. A plating device, comprising a plating tank whichhas an anode therein and causing a plating solution to flow into theplating tank and to jet upward to touch a surface-to-be-plated of asubstrate-to-be-plated while electrifying between the anode and thesubstrate-to-be-plated, so that plating is performed, the plating tankhaving a double structure including a first cylindrical cup and a secondcylindrical cup whose external diameter is smaller than that of thefirst cylindrical cup, the first cylindrical cup being provided with theanode and having a bottom provided with a plating solution flowing-inport via which the plating solution flows into the plating tank, a gapbetween side walls of the first cylindrical cup and the secondcylindrical cup serving as a plating solution flowing-out port via whichthe plating solution having flowed into the anode chamber flows out ofthe plating tank, the second cylindrical cup having a bottom which is apartition separating the anode from the substrate-to-be-plated, theplating tank being divided into an anode chamber surrounded by thepartition and the first cylindrical cup and a substrate-to-be-platedchamber surrounded by the partition and the first cylindrical cup, and aplating solution jetting pipe being provided so as to jet the platingsolution to the surface-to-be-plated of the substrate-to-be-plated, theplating solution jetting pipe penetrating the partition and allowing alaminar flow of the plating solution from the plating solutionflowing-in port to be divided into a laminar flow of the platingsolution to the first cylindrical cup and a laminar flow of the platingsolution to the second cylindrical cup.
 34. The plating device as setforth in claim 33, wherein the plating solution having flowed into theanode chamber does not flow into the substrate-to-be-plated chamber. 35.The plating device as set forth in claim 33, wherein a portion whichseparates the anode from the substrate-to-be-plated and which includesthe partition in the plating tank is partially or entirely made of apermeation member which, when immersed in the plating solution, allowsions in the plating solution to permeate the permeation member.
 36. Theplating device as set forth in claim 35, wherein the permeation memberis a semipermeable membrane.
 37. The plating device as set forth inclaim 35, wherein the permeation member includes an ion exchangemembrane.
 38. The plating device as set forth in claim 33, wherein thepartition has a thickness ranging from 50 to 200 μm.
 39. The platingdevice as set forth in claim 33, wherein the partition includes ahydrocarbon cation exchange membrane.
 40. The plating device as setforth in claim 33, further comprising: a plating solution supplyingsource for storing a plating solution to be supplied to the platingtank; plating solution supplying means for supplying the platingsolution stored in the plating solution supplying source to the platingtank; and plating solution filtering means for filtering the platingsolution supplied by the plating solution supplying means, the platingsolution stored in the plating solution supplying source being suppliedto the plating tank by the plating solution supplying means and via theplating solution filtering means, and the plating solution supplied tothe plating tank being supplied again to the plating solution supplyingsource.
 41. The plating device as set forth in claim 33, wherein theplating solution includes a copper component and is conductive.
 42. Theplating device as set forth in claim 33, wherein the plating solutionincludes a copper component of not less than 14 g and not more than 40 gper 1 lifter of the plating solution.
 43. The plating device as setforth in claim 33, wherein the anode is a soluble anode made of highphosphorous copper.
 44. The plating device as set forth in claim 33,wherein the substrate-to-be-plated is a semiconductor wafer.
 45. Aplating method for causing a plating solution to flow into a platingtank and to jet upward to touch a surface-to-be-plated of asubstrate-to-be-plated while electrifying between an anode in theplating tank and the substrate-to-be-plated, so that plating isperformed, the plating tank having a double structure including a firstcylindrical cup and a second cylindrical cup whose external diameter issmaller than that of the first cylindrical cup, said method comprisingthe steps of: dividing a laminar flow of the plating solution into alaminar flow of the plating solution jetted to the surface-to-be-platedand a laminar flow of the plating solution flowing to a neighbor of theanode; and causing the plating solution having flowed into the anodechamber to flow out of the plating tank via a plating solutionflowing-out port which is a gap between side walls of the firstcylindrical cup and the second cylindrical cup.
 46. A method formanufacturing a semiconductor device, comprising the step (I) of causinga plating solution to flow into a plating tank and to jet upward totouch a surface-to-be-plated of a substrate-to-be-plated whileelectrifying between an anode and the substrate-to-be-plated in theplating tank, so that plating is performed, the plating tank having adouble structure including a first cylindrical cup and a secondcylindrical cup whose external diameter is smaller than that of thefirst cylindrical cup, in the step (I), the anode and thesurface-to-be-plated being positioned to be separated from each other inthe plating tank by a partition, a flow of the plating solution beingdivided into a flow to the surface-to-be-plated and a flow to a neighborof the anode, and the plating solution having flowed into the anodechamber is caused to flow out of the plating tank via a plating solutionflowing-out port which is a gap between side walls of the firstcylindrical cup and the second cylindrical cup.
 47. The method as setforth in claim 46, wherein in the step (I), the plating solution havingflowed to the neighbor of the anode does not flow to thesurface-to-be-plated.
 48. The method as set forth in claim 46, wherein aportion which separates the anode from the substrate-to-be-plated andwhich includes the partition in the plating tank is partially orentirely made of a permeation member which, when immersed in the platingsolution, allows ions in the plating solution to permeate the permeationmember.
 49. The method as set forth in claim 48, wherein the permeationmember is a semipermeable membrane.
 50. The method as set forth in claim48, wherein the permeation member includes an ion exchange membrane. 51.The method as set forth in claim 46, wherein the partition has athickness ranging from 50 to 200 μm.
 52. The method as set forth inclaim 46, wherein the partition includes a hydrocarbon cation exchangemembrane.
 53. The method as set forth in claim 46, wherein the step (I)includes the sub-steps of: (i) supplying a plating solution stored in aplating solution supplying source to the plating tank; (ii) filteringthe plating solution supplied in the sub-step (i); and (iii) supplyingagain the plating solution supplied to the plating tank to the platingsolution supplying source.
 54. The method as set forth in claim 46,wherein the plating solution includes a copper component and isconductive.
 55. The method as set forth in claim 46, wherein the platingsolution includes a copper component of not less than 14 g and not morethan 40 g per 1 litter of the plating solution.
 56. The method as setforth in claim 46, wherein the anode is a soluble anode made of highphosphorous copper.
 57. The method as set forth in claim 46, wherein thesubstrate-to-be-plated is a semiconductor wafer.
 58. The method as setforth in claim 46, further comprising the steps of: (II) forming a seedlayer on the surface-to-be-plated; (III) applying photoresist on asurface of the seed layer formed in the step (II); and (IV) forming apattern by exposing and developing the photoresist, the steps (II) to(IV) being performed before the step (I).
 59. A semiconductor device,manufactured through a method as set forth in claim 46.